SEMICONDUCTOR INTEGRATED CIRCUITS WITH POWER REDUCTION MECHANISM

A semiconductor device including first and second power lines, and first and second circuit blocks coupled between the power lines. A first switching element is inserted between the first circuit block and at least one of the power lines and a second switching element is inserted between the second...

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Bibliographic Details
Main Authors ITOH KIYOO, SAKATA TAKESHI, HORIGUCHI MASASHI
Format Patent
LanguageEnglish
Published 06.05.2010
Subjects
BASIC ELECTRONIC CIRCUITRY
CONTROLLING
ELECTRICITY
INFORMATION STORAGE
PHYSICS
PULSE TECHNIQUE
REGULATING
STATIC STORES
SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
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Summary:A semiconductor device including first and second power lines, and first and second circuit blocks coupled between the power lines. A first switching element is inserted between the first circuit block and at least one of the power lines and a second switching element is inserted between the second circuit block and at least one of the power lines. The first switching element is rendered conductive to allow the first circuit block to receive the power voltage through the first and second power lines while the second switching element is rendered nonconductive to prevent the second circuit block from receiving the power voltage through the first and second power lines, so that a leakage current flowing through the second circuit is suppressed.
Bibliography:Application Number: US20090645784