SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY SYSTEM

A semiconductor memory device includes a plurality of memory cell arrays each including a plurality of memory cells arranged in a matrix pattern, and a plurality of cell plate lines each being shared by the memory cell arrays, each of the cell plate lines corresponding to each of rows of the memory...

Full description

Saved in:
Bibliographic Details
Main Authors MURAKUKI YASUO, IWANARI SHUNICHI, MATSUURA MASANORI, GOHOU YASUSHI, NAKAO YOSHIAKI
Format Patent
LanguageEnglish
Published 01.10.2009
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
Online AccessGet full text

Cover

More Information
Summary:A semiconductor memory device includes a plurality of memory cell arrays each including a plurality of memory cells arranged in a matrix pattern, and a plurality of cell plate lines each being shared by the memory cell arrays, each of the cell plate lines corresponding to each of rows of the memory cells and each of the cell plate lines being connected to the memory cells of a corresponding one of the rows. Each of the memory cell arrays includes a plurality of word lines each of which corresponds to each of the rows of the memory cells in the memory cell array. The number of the memory cells connected to each of the cell plate lines is larger than the number of the memory cells connected to one of the word lines corresponding to the each of the cell plate lines.
Bibliography:Application Number: US20090368622