Techniques for Layer Transfer Processing

Techniques for the fabrication of semiconductor devices are provided. In one aspect, a layer transfer structure is provided. The layer transfer structure comprises a carrier substrate having a porous region with a tuned porosity in combination with an implanted species defining a separation plane th...

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Main Authors FOGEL KEITH EDWARD, TOPOL ANNA WANDA, FURMAN BRUCE KENNETH, BEDELL STEPHEN W, PURUSHOTHAMAN SAMPATH, SADANA DEVENDRA K
Format Patent
LanguageEnglish
Published 17.09.2009
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
LAYERED PRODUCTS
LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
PERFORMING OPERATIONS
SEMICONDUCTOR DEVICES
TRANSPORTING
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Summary:Techniques for the fabrication of semiconductor devices are provided. In one aspect, a layer transfer structure is provided. The layer transfer structure comprises a carrier substrate having a porous region with a tuned porosity in combination with an implanted species defining a separation plane therein. In another aspect, a method of forming a layer transfer structure is provided. In yet another aspect, a method of forming a three dimensional integrated structure is provided.
Bibliography:Application Number: US20090472943