Methods of manufcturing a semiconductor device

Isolation regions are formed on a substrate to define an active region. A gate electrode is formed on the active region. A spacer structure is formed on a sidewall of the gate electrode. A gate silicide layer is formed on the gate electrode and a source/drain silicide layer is formed on the active r...

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Bibliographic Details
Main Authors SHIN DONG-SUK, KIM KIUL, LEE JUNG-DEOG
Format Patent
LanguageEnglish
Published 10.09.2009
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Summary:Isolation regions are formed on a substrate to define an active region. A gate electrode is formed on the active region. A spacer structure is formed on a sidewall of the gate electrode. A gate silicide layer is formed on the gate electrode and a source/drain silicide layer is formed on the active region adjacent to the gate electrode. An upper portion of the gate silicide layer and a portion of the spacer structure are simultaneously removed to form a spacer structure pattern and a gate silicide layer pattern. A stress layer is formed to cover the gate electrode and spacer structure pattern.
Bibliography:Application Number: US20090381175