STRUCTURE FOR UNIVERSAL PERIPHERAL PROCESSOR SYSTEM FOR SOC ENVIRONMENTS ON AN INTEGRATED CIRCUIT

A design structure including universal peripheral processor architecture on an integrated circuit (IC) includes first and second data buses coupled to interface logic devices for enabling communication between the first and second data buses including enabling interface of multiple signaling protoco...

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Bibliographic Details
Main Authors MANN GREGORY J, BUETI SERAFINO, NORMAN JASON M, SANDON PETER A, LEONARD TODD E, GOODNOW KENNETH J, OGILVIE CLARENCE R, WOODRUFF CHARLES S
Format Patent
LanguageEnglish
Published 21.05.2009
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A design structure including universal peripheral processor architecture on an integrated circuit (IC) includes first and second data buses coupled to interface logic devices for enabling communication between the first and second data buses including enabling interface of multiple signaling protocols. One or more processors communicate with the first and second data buses to manage control functions on the IC. A data path enables transfer of data between the first and second data buses, and communicates with data storage devices. A data control path enables communication between the data storage devices and the processors.
Bibliography:Application Number: US20080122289