SEMICONDUCTOR INTEGRATED CIRCUIT

A clock signal generation circuit into which a first clock signal and a control signal based on an address are inputted, and a second clock signal based on said first clock signal is generated after a lapse of predetermined time from said input of the control signal.

Saved in:
Bibliographic Details
Main Author SASAKI TSUNEKI
Format Patent
LanguageEnglish
Published 21.05.2009
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A clock signal generation circuit into which a first clock signal and a control signal based on an address are inputted, and a second clock signal based on said first clock signal is generated after a lapse of predetermined time from said input of the control signal.
Bibliography:Application Number: US20080262645