Memory Switching Data Processing System

A memory switching data processing system including one or more central processing units ('CPUs'); random access memory organized in at least two banks of memory modules; one or more memory buses providing communications paths for data among the CPUs and the memory modules; and a flexibly...

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Main Authors DURHAM ZACHARY B, REINBERG KEVIN M, MAXWELL JOSEPH E, BANDHOLZ JUSTIN P, VERNON KEVIN S.D, KERR CLIFTON E, WEST CHRISTOPHER C, WEINSTEIN PHILIP L
Format Patent
LanguageEnglish
Published 26.03.2009
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A memory switching data processing system including one or more central processing units ('CPUs'); random access memory organized in at least two banks of memory modules; one or more memory buses providing communications paths for data among the CPUs and the memory modules; and a flexibly configurable memory bus switch comprising a first configuration adapting the first CPU to a first bank of memory modules and a second CPU to a second bank of memory modules and a second configuration adapting the first CPU to both the first bank of memory modules and the second bank of memory modules.
Bibliography:Application Number: US20070859835