ELECTRICAL FUSE WITH ENHANCED PROGRAMMING CURRENT DIVERGENCE

A layer of semiconductor material is patterned to form a cathode semiconductor portion, a fuselink semiconductor portion, and an anode semiconductor portion. A first metal layer is deposited on the patterned semiconductor material layer. A dielectric material layer is deposited and lithographically...

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Bibliographic Details
Main Authors KOTHANDARAMAN CHANDRASEKHARAN, CHIDAMBARRAO DURESETI, KIM DEOK-KEE, HENSON WILLIAM K
Format Patent
LanguageEnglish
Published 12.02.2009
Subjects
BASIC ELECTRIC ELEMENTS
COMBINED OPERATIONS
ELECTRIC SWITCHES
ELECTRICITY
EMERGENCY PROTECTIVE DEVICES
MACHINE TOOLS
METAL-WORKING NOT OTHERWISE PROVIDED FOR
OTHER WORKING OF METAL
PERFORMING OPERATIONS
RELAYS
SELECTORS
TRANSPORTING
UNIVERSAL MACHINE TOOLS
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Summary:A layer of semiconductor material is patterned to form a cathode semiconductor portion, a fuselink semiconductor portion, and an anode semiconductor portion. A first metal layer is deposited on the patterned semiconductor material layer. A dielectric material layer is deposited and lithographically patterned to cover a middle portion of the fuselink, followed by a deposition of a second metal layer. A thin metal semiconductor alloy is formed in the middle of the fuselink and thick metal semiconductor alloy alloys are formed abutting the thin metal semiconductor alloy alloy. The resulting inventive electrical fuse has interfaces at which a thinner metal semiconductor alloy abuts a thicker metal semiconductor alloy in the fuselink. The divergence of electrical current is enhanced at the interfaces due to a sudden change of a cross-sectional area available for current conduction.
Bibliography:Application Number: US20070835846