Disk array apparatus

A disk array apparatus where, when a failure occurs at a part of a cache memory, a memory area of an I/O processing controller other than the memory area where the failure has occurred is utilized without taking over the whole I/O processing to an I/O processing controller of other system is provide...

Full description

Saved in:
Bibliographic Details
Main Authors OKAKI TAKUYA, TANABE MASAYUKI
Format Patent
LanguageEnglish
Published 23.10.2008
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:A disk array apparatus where, when a failure occurs at a part of a cache memory, a memory area of an I/O processing controller other than the memory area where the failure has occurred is utilized without taking over the whole I/O processing to an I/O processing controller of other system is provided, so that influence of performance degradation can be minimized. In a disk array apparatus including dual cache memories, when a failure occurs at a part of the cache memory, only a memory area where the failure has occurred is closed, and reallocation thereof to another memory area of the same cache memory is conducted to continue an I/O processing.
Bibliography:Application Number: US20080010051