Semiconductor memory device including post package repair control circuit and post package repair method
Provided are a semiconductor memory device having a post package repair control circuit and a post package repair method. In the semiconductor memory device and the post package repair method, in a post package repair mode, a second memory bank is used as a fail bit map memory for storing failed bit...
Saved in:
Main Authors | , , , , , |
---|---|
Format | Patent |
Language | English |
Published |
09.10.2008
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | Provided are a semiconductor memory device having a post package repair control circuit and a post package repair method. In the semiconductor memory device and the post package repair method, in a post package repair mode, a second memory bank is used as a fail bit map memory for storing failed bit information regarding a first memory bank, and the first memory bank is used as a fail bit map memory for storing failed bit information regarding the second memory bank. |
---|---|
Bibliography: | Application Number: US20080080728 |