Test Structures for Identifying an Allowable Process Margin for Integrated Circuits and Related Methods

• Main Authors: JIN YOU-SEUNG, BAE CHOEL-HWYI
• Format: Patent
• Language: English
• Published: 18.09.2008
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A test structure for inspecting an allowable process margin in a manufacturing process for a semiconductor device is provided. The test structure includes a plurality of grounded conductive lines on a substrate and electrically grounded to the substrate. A plurality of floating conductive lines are...