SEMICONDUCTOR CHIP MOUNTING SUBSTRATE, SEMICONDUCTOR CHIP MOUNTING BODY, SEMICONDUCTOR CHIP STACKED MODULE, AND SEMICONDUCTOR CHIP MOUNTING SUBSTRATE MANUFACTURING METHOD

There is provided a semiconductor chip mounting substrate including a substrate on which a mounting region for mounting a semiconductor chip and a connection region for interlayer connection of the semiconductor chip are formed, and a plurality of alignment marks for alignment at the time of stackin...

Full description

Saved in:
Bibliographic Details
Main Authors NAKAHASHI AKIHISA, MAEGAWA YUKIHIRO, SUZUKI NAOKI
Format Patent
LanguageEnglish
Published 21.08.2008
Subjects
BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:There is provided a semiconductor chip mounting substrate including a substrate on which a mounting region for mounting a semiconductor chip and a connection region for interlayer connection of the semiconductor chip are formed, and a plurality of alignment marks for alignment at the time of stacking which are provided around or in the connection region on the substrate, wherein a reinforcing member as a reinforcing region for reinforcing a portion between the plurality of alignment marks is provided on the substrate.
Bibliography:Application Number: US20080031363