Method and Apparatus for Enabling Resource Allocation Identification at the Instruction Level in a Processor System
An information handling system includes a processor with multiple hardware units that generate program application load, store, and I/O interface requests to system busses within the information handling system. The processor includes a resource allocation identifier (RAID) that links the processor...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
07.08.2008
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Subjects | |
Online Access | Get full text |
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