SEMICONDUCTOR MEMORY DEVICE

Disclosed is a semiconductor memory including ferroelectric capacitors. Memory cells each including a ferroelectric capacitor and an insulted-gate-type cell transistor are connected to a corresponding one of bit lines. Insulated-gate-type separating transistors are connected between multiple bit-lin...

Full description

Saved in:
Bibliographic Details
Main Authors TAKASHIMA DAISABURO, OGIWARA RYU
Format Patent
LanguageEnglish
Published 31.07.2008
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
Online AccessGet full text

Cover

More Information
Summary:Disclosed is a semiconductor memory including ferroelectric capacitors. Memory cells each including a ferroelectric capacitor and an insulted-gate-type cell transistor are connected to a corresponding one of bit lines. Insulated-gate-type separating transistors are connected between multiple bit-line selecting transistors and multiple sense amplifiers, respectively. When the separating transistors are turned on, data retained in the sense amplifiers are capable of being written to the memory cells during the same time period substantially.
Bibliography:Application Number: US20080968829