Pedestal pocket tray containment system for integrated circuit chips
A stacking tray for electrical components, such as integrated circuit chips, particularly those of the ball grid array (BGA) type is disclosed. The tray is stackable and includes an upper side and a lower side. An array of storage pockets is formed between the upper side of a lower tray and the lowe...
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Main Author | |
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Format | Patent |
Language | English |
Published |
24.07.2008
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Subjects | |
Online Access | Get full text |
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Summary: | A stacking tray for electrical components, such as integrated circuit chips, particularly those of the ball grid array (BGA) type is disclosed. The tray is stackable and includes an upper side and a lower side. An array of storage pockets is formed between the upper side of a lower tray and the lower side of an upper tray. The storage pockets are separated by complementary support elements and further include a segmented pedestal arising from the center of the storage pocket, on the upper side of the trays. The segmented pedestal supports the integrated circuit chip, without interfering with the spherical balls. Moreover, the tray allows for variation of the dimensions of the integrated circuit chip while adequately stabilizing the chip. |
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Bibliography: | Application Number: US20070656657 |