METHOD OF MANUFACTURING HIGH VOLTAGE DEVICE

A method of manufacturing a high voltage device includes forming a junction region in a semiconductor substrate. An insulating layer is formed over the semiconductor substrate. A portion of the insulating layer is etched so that the junction region is exposed. Arsenic is implanted into the exposed j...

Full description

Saved in:
Bibliographic Details
Main Authors SEO JI HYUN, LEE DONG KEE
Format Patent
LanguageEnglish
Published 01.05.2008
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A method of manufacturing a high voltage device includes forming a junction region in a semiconductor substrate. An insulating layer is formed over the semiconductor substrate. A portion of the insulating layer is etched so that the junction region is exposed. Arsenic is implanted into the exposed junction region to form plug ion implantation regions. A plug is formed on the plug ion implantation regions into which arsenic has been implanted.
Bibliography:Application Number: US20060617677