TRIGGERED SILICON CONTROLLED RECTIFIER FOR RF ESD PROTECTION

An ESD protection circuit is formed at the input/output interface contact of an integrated circuit to protect the integrated circuit from damage caused by an ESD event. The ESD protection circuit has a polysilicon bounded SCR connected between a signal input/output interface contact of the integrate...

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Bibliographic Details
Main Authors YA TAN P, FILIPPI RAYMOND, MANNA INDRAJIT, FOO LO K
Format Patent
LanguageEnglish
Published 03.01.2008
Subjects
BASIC ELECTRIC ELEMENTS
CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
CURRENT COLLECTORS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
GENERATION
LINE CONNECTORS
SEMICONDUCTOR DEVICES
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Summary:An ESD protection circuit is formed at the input/output interface contact of an integrated circuit to protect the integrated circuit from damage caused by an ESD event. The ESD protection circuit has a polysilicon bounded SCR connected between a signal input/output interface contact of the integrated circuit and a power supply connection of the integrated circuit and a biasing circuit. The biasing circuit is connected to the polysilicon bounded SCR to bias the polysilicon bounded SCR to turn on more rapidly during the ESD event. The biasing circuit is formed by at least one polysilicon bounded diode and a first resistance. Other embodiments of the biasing circuit include a resistor/capacitor biasing circuit and a second diode triggering biasing circuit.
Bibliography:Application Number: US20070854104