INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME

• Main Authors: MIMURO KEN, UCHIDA MIKIYA, SETO CHINATSU, KANAZAKI EMI
• Format: Patent
• Language: English
• Published: 04.10.2007
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

An integrated circuit includes: a semiconductor substrate that has a well region containing a first conductivity type impurity; and an enhancement type MOS transistor and a plurality of depletion type MOS transistors, each of which is formed in the well region and has a channel region under a gate electrode. At least one of the depletion type MOS transistors has, in the channel region, an implantation region into which a second conductivity type impurity is implanted so that a threshold voltage is adjusted. The implantation region has the first conductivity type impurity and the second conductivity type impurity. Further, the second conductivity type impurity has a concentration that is higher than a concentration of the first conductivity type impurity. There are provided an integrated circuit that includes both of enhancement type MOS transistors and depletion type MOS transistors, the transistors of the second conductivity type having a varying threshold voltage and a high modulation degree and achieving reductions in variations in the threshold voltage and the modulation degree; a solid-state imaging device including the integrated circuit; and methods of manufacturing the integrated circuit and the solid-state imaging device.