Viterbi pack instruction

A Viterbi pack instruction is disclosed that masks the contents of a first predicate register with a first masking value and masks the contents of a second predicate register with a second masking value. The resulting masked data is written to a destination register. The Viterbi pack instruction may...

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Main Authors ZENG MAO, CODRESCU LUCIAN
Format Patent
LanguageEnglish
Published 27.09.2007
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Abstract A Viterbi pack instruction is disclosed that masks the contents of a first predicate register with a first masking value and masks the contents of a second predicate register with a second masking value. The resulting masked data is written to a destination register. The Viterbi pack instruction may be implemented in hardware, firmware, software, or any combination thereof.
AbstractList A Viterbi pack instruction is disclosed that masks the contents of a first predicate register with a first masking value and masks the contents of a second predicate register with a second masking value. The resulting masked data is written to a destination register. The Viterbi pack instruction may be implemented in hardware, firmware, software, or any combination thereof.
Author ZENG MAO
CODRESCU LUCIAN
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Snippet A Viterbi pack instruction is disclosed that masks the contents of a first predicate register with a first masking value and masks the contents of a second...
SourceID epo
SourceType Open Access Repository
SubjectTerms BASIC ELECTRONIC CIRCUITRY
CODE CONVERSION IN GENERAL
CODING
DECODING
DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER
ELECTRICITY
Title Viterbi pack instruction
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