Viterbi pack instruction

A Viterbi pack instruction is disclosed that masks the contents of a first predicate register with a first masking value and masks the contents of a second predicate register with a second masking value. The resulting masked data is written to a destination register. The Viterbi pack instruction may...

Full description

Saved in:
Bibliographic Details
Main Authors ZENG MAO, CODRESCU LUCIAN
Format Patent
LanguageEnglish
Published 27.09.2007
Subjects
BASIC ELECTRONIC CIRCUITRY
CODE CONVERSION IN GENERAL
CODING
DECODING
DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER
ELECTRICITY
Online AccessGet full text

Cover

More Information
Summary:A Viterbi pack instruction is disclosed that masks the contents of a first predicate register with a first masking value and masks the contents of a second predicate register with a second masking value. The resulting masked data is written to a destination register. The Viterbi pack instruction may be implemented in hardware, firmware, software, or any combination thereof.
Bibliography:Application Number: US20060389443