APPARATUS AND METHOD FOR REDUCING THE LEAKAGE CURRENT OF MEMORY CELLS IN THE ENERGY-SAVING MODE

The energy consumption of a static memory cell, which may be connected to a first bit line and a second bit line of a bit line pair by means of transistors, is reduced in an energy-saving mode of operation by adjusting the potentials on each of the bit lines of the bit line pair such that a potentia...

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Bibliographic Details
Main Author KUENEMUND THOMAS
Format Patent
LanguageEnglish
Published 20.09.2007
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:The energy consumption of a static memory cell, which may be connected to a first bit line and a second bit line of a bit line pair by means of transistors, is reduced in an energy-saving mode of operation by adjusting the potentials on each of the bit lines of the bit line pair such that a potential difference between the gate terminals of the transistors and the bit lines of the bit line pair is reduced in comparison with a normal mode of operation.
Bibliography:Application Number: US20070686509