REDUCING FLOATING GATE TO FLOATING GATE COUPLING EFFECT

For a non-volatile memory system, compressing the erase threshold voltage distribution into the lowest threshold voltage state will decrease the valid data threshold voltage window. Decreasing the valid data threshold voltage window reduces the floating gate to floating gate coupling effect. The com...

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Bibliographic Details
Main Authors GUTERMAN DANIEL C, FONG YUPIN
Format Patent
LanguageEnglish
Published 23.08.2007
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:For a non-volatile memory system, compressing the erase threshold voltage distribution into the lowest threshold voltage state will decrease the valid data threshold voltage window. Decreasing the valid data threshold voltage window reduces the floating gate to floating gate coupling effect. The compression can be performed as part of the erase process or part of the programming operation.
Bibliography:Application Number: US20070735265