Memory device with reduced word line resistance

A memory device includes a plurality of blocks, with each block having a respective array of memory cells and respective local word lines. The memory device also includes a respective switching device coupled between each local word line and a common voltage node. A global word line driver controls...

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Bibliographic Details
Main Authors KIM DU-EUNG, CHO BEAK-HYUNG
Format Patent
LanguageEnglish
Published 16.08.2007
Subjects
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