ISOLATION TRENCH OF A SEMICONDUCTOR DEVICE
Embodiments relate to a method for forming an isolation trench of a semiconductor device. In embodiments, a method for forming an isolation trench of a semiconductor device may include forming a mask layer pattern on a semiconductor substrate, forming an organic material layer on the semiconductor s...
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Main Author | |
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Format | Patent |
Language | English |
Published |
28.06.2007
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Subjects | |
Online Access | Get full text |
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Summary: | Embodiments relate to a method for forming an isolation trench of a semiconductor device. In embodiments, a method for forming an isolation trench of a semiconductor device may include forming a mask layer pattern on a semiconductor substrate, forming an organic material layer on the semiconductor substrate and the mask layer, and forming an isolation trench having a width defined by the mask layer pattern and an organic material spacer layer formed by etching the organic material layer through an etching process for the organic material layer and the semiconductor substrate. |
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Bibliography: | Application Number: US20060616810 |