Semiconductor memory device

Suppressing a leakage current is required in a flash memory because the channel length is made shorter with a reduction in the memory cell size. In an AND type memory array having an assist electrode, although the memory cell area has been reduced by the field isolation using a MOS transistor, leaka...

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Bibliographic Details
Main Authors KURATA HIDEAKI, OTSUGA KAZUO, KOBAYASHI TAKASHI, SASAGO YOSHITAKA, ARIGANE TSUYOSHI
Format Patent
LanguageEnglish
Published 17.05.2007
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:Suppressing a leakage current is required in a flash memory because the channel length is made shorter with a reduction in the memory cell size. In an AND type memory array having an assist electrode, although the memory cell area has been reduced by the field isolation using a MOS transistor, leakage current in the channel direction becomes greater with a reduction in the memory cell size, resulting in problems arising like deterioration of programming characteristics, an increase in the current consumption, and reading failure. To achieve the objective, in the present invention, electrical isolation is performed by controlling at least one assist electrode of the assist electrodes wired in parallel to be a negative voltage during program and read operations and by making the semiconductor substrate surface in the vicinity of the aforementioned assist electrode non-conductive.
Bibliography:Application Number: US20070652023