Bit-wise operation followed by byte-wise permutation for implementing DSP data manipulation instructions
A digital signal processor having a generalized byte-wise data movement permute facility configurable at the microarchitectural level to execute a variety of ISA-level byte-wise data manipulation instructions. A bit-wise data manipulation facility is also provided. By combining the two, the bit-wise...
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Main Author | |
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Format | Patent |
Language | English |
Published |
10.05.2007
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Subjects | |
Online Access | Get full text |
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Summary: | A digital signal processor having a generalized byte-wise data movement permute facility configurable at the microarchitectural level to execute a variety of ISA-level byte-wise data manipulation instructions. A bit-wise data manipulation facility is also provided. By combining the two, the bit-wise facility can be greatly simplified without sacrificing ISA-level functionality of bit-wise data manipulation instructions. |
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Bibliography: | Application Number: US20050270213 |