Method for forming an integrated circuit with high voltage and low voltage devices
A method is disclosed for integrally forming at least one low voltage device and at least one high voltage device. According to the method, a first gate structure and a second gate structure are formed on a semiconductor substrate, wherein the first and second gate structures are isolated from one a...
Saved in:
Main Authors | , , , , |
---|---|
Format | Patent |
Language | English |
Published |
10.05.2007
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | A method is disclosed for integrally forming at least one low voltage device and at least one high voltage device. According to the method, a first gate structure and a second gate structure are formed on a semiconductor substrate, wherein the first and second gate structures are isolated from one another. One or more first double diffused regions are formed adjacent to the first gate structure in the semiconductor substrate. One or more second double diffused regions are formed adjacent to the second gate structure in the semiconductor substrate. One or more first source/drain regions are formed within the first double diffused regions. One or more second source/drain regions are formed within the second double diffused regions. The first double diffused regions function as one or more lightly doped source/drain regions for the low voltage device. |
---|---|
Bibliography: | Application Number: US20050271933 |