Automatic reference voltage trimming technique

In one set of embodiments, trimming of a reference, which may be a bandgap reference and which is configured on an integrated circuit, may be controlled by an algorithm executed by logic circuitry also configured on the integrated circuit. The bandgap reference may be configured to generate a refere...

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Bibliographic Details
Main Authors ANDERSON THOMAS R, CASTELLANO WILLIAM, MCLEOD SCOTT C
Format Patent
LanguageEnglish
Published 07.12.2006
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:In one set of embodiments, trimming of a reference, which may be a bandgap reference and which is configured on an integrated circuit, may be controlled by an algorithm executed by logic circuitry also configured on the integrated circuit. The bandgap reference may be configured to generate a reference voltage provided to an analog to digital converter (ADC) comprised in a temperature sensor that may also be configured on the integrated circuit. The logic circuitry may be configured to execute one or more of a variety of test algorithms, for example a Successive Approximation Method or remainder processing, that are operable to adjust values of reference trim bits used in trimming the bandgap reference. A tester system configured to perform testing of the integrated circuit may initiate execution of the test algorithm, thereby initiating the trimming process, and may wait for the test algorithm to complete within a previously defined amount of time, or may poll the logic circuitry to determine when the trimming process is complete.
Bibliography:Application Number: US20050145906