Method of fabricating flash memory device

• Main Authors: LEE DONG K, PARK JEONG H, KIM TAE G
• Format: Patent
• Language: English
• Published: 05.10.2006
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method of fabricating a flash memory device includes defining a high voltage region and a low voltage region on a substrate. The high voltage region provides an area for one or more first transistors configured to operation at a first voltage, the low voltage region providing an area for one or more second transistors configured to operation at a second voltage that is lower than the first voltage, each first transistor having a gate and a source/drain region on each side of the gate. A first impurity region is formed as part of the source/drain region, the first impurity region having a first depth from an upper surface of the substrate, the first impurity region being of first conductivity having a first impurity concentration. A second impurity is formed as part of the source/drain region, the second impurity region having a second depth from the upper surface of the substrate that is less than first depth, the second impurity region being of the first conductivity and having a second impurity concentration that is greater than the first impurity concentration. Impurities of second conductivity are implanted into the source/drain region.