Comparator switching apparatus and method
An operation switching circuit switches over two comparators, which receives communication data, in accordance with a normal mode and a standby mode of a microcomputer. A delay circuit delays a mode switching signal. The mode switching signal and the delayed signal are combined by an OR gate and an...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
08.06.2006
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Subjects | |
Online Access | Get full text |
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Summary: | An operation switching circuit switches over two comparators, which receives communication data, in accordance with a normal mode and a standby mode of a microcomputer. A delay circuit delays a mode switching signal. The mode switching signal and the delayed signal are combined by an OR gate and an AND gate to two comparator control signals, which have different high level periods. The comparators are driven by the comparator control signals, while a multiplexer is driven by the delayed signal. When one comparator is switched from the inoperative state to the operative state, the other comparator is continued to be held operative for the delay period before being switched to the inoperative state. |
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Bibliography: | Application Number: US20050239083 |