Method and system for debugging flow control based designs

Certain embodiments for debugging mechanism for flow control based designs may comprise a debugging interface module between a transmitter and a receiver, all integrated on a chip. At least one debugging entity, which may be on the chip or off the chip, may indicate to the debugging interface module...

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Bibliographic Details
Main Authors SHIH GUANG-TING, CHEN JIANN-TSUEN
Format Patent
LanguageEnglish
Published 30.03.2006
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Certain embodiments for debugging mechanism for flow control based designs may comprise a debugging interface module between a transmitter and a receiver, all integrated on a chip. At least one debugging entity, which may be on the chip or off the chip, may indicate to the debugging interface module to initiate debug mode via command signals. In debug mode, the control signals between the transmitter and the receiver may be intercepted by the debugging interface module to halt normal data flow from the transmitter to the receiver. The debugging entity may then transmit data to the receiver, while the transmitter is disabled, or receive data transmitted by the transmitter, while the receiver is disabled. When the debugging entity indicates to the debugging interface module to end debug mode, normal data flow may continue, and the debugging interface module may appear transparent to the data flow.
Bibliography:Application Number: US20040981178