Information processing apparatus having command-retry verification function, and command retry method

A parity generating circuit reverses generated parity data to detect a parity error of a CSE entry during a determination of completion to execute a command retry. A parity check circuit that detects a parity error requests for the execution of the command retry. When a command retry mechanism stops...

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Bibliographic Details
Main Authors GOMYO NORIHITO, AKIZUKI YASUNOBU
Format Patent
LanguageEnglish
Published 02.02.2006
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A parity generating circuit reverses generated parity data to detect a parity error of a CSE entry during a determination of completion to execute a command retry. A parity check circuit that detects a parity error requests for the execution of the command retry. When a command retry mechanism stops a program and interrupts a verification, the execution of the command retry is suppressed by assuming that no parity error is detected.
Bibliography:Application Number: US20040986152