Semiconductor device including a hybrid metallization layer stack for enhanced mechanical strength during and after packaging
The introduction of dielectric material of enhanced mechanical stability, such as silicon dioxide or fluorine-doped silicon dioxide, into the via level of a low-k interconnect structure provides an increased overall mechanical stability, especially during the packaging of the device. Consequently, c...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
03.11.2005
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | The introduction of dielectric material of enhanced mechanical stability, such as silicon dioxide or fluorine-doped silicon dioxide, into the via level of a low-k interconnect structure provides an increased overall mechanical stability, especially during the packaging of the device. Consequently, cracking and delamination, as frequently observed in high end low-k interconnect structures, may significantly be reduced, even if organic package substrates are used. |
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Bibliography: | Application Number: US20050046986 |