Floating gate memory cells with increased coupling radio

• Main Authors: VAN SCHAIJK ROBERTUS THEODORUS F, VAN DUUREN MICHIEL J
• Format: Patent
• Language: English
• Published: 06.10.2005
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method to improve the coupling ratio between a control gate ( 18 ) and a floating gate ( 14 ) of a floating gate non-volatile semiconductor device is described. In a stacked gate floating gate transistor according to the invention, a conductive spacer ( 24 ) is used at both sides of the stack. The conductive spacer ( 24 ) is galvanically connected to the control gate ( 18 ), preferably by means of a conductive layer ( 34 ), whereas it is separated from the floating gate ( 14 ) by means of an insulating layer ( 22 ). The capacitance (C 1 , C 2 ) between both conductive spacers ( 24 ) and the side walls of the floating gate ( 14 ) adds up to the normal capacitance between control gate ( 18 ) and floating gate ( 14 ).