Body contact layout for semiconductor-on-insulator devices

• Main Authors: REYER KENNETH J, PLASS DONALD W
• Format: Patent
• Language: English
• Published: 16.06.2005
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method and structure is provided for an improved body contact layout for semiconductor-on-insulator (SOI) devices. In one embodiment, an insulated gate field effect transistor and method for fabrication of such a transistor is provided. The insulated gate field effect transistor includes a source, a drain, and a channel formed in a layer of a single-crystal semiconductor. The layer is disposed over and insulated from a bulk semiconductor layer of a substrate by a buried insulator layer. A gate conductor is disposed in an annular pattern overlying the channel, such that the gate conductor surrounds one of the source and drain disposed to the inside of the annular pattern, the other of the source and drain being disposed to the outside of the annular pattern. A second conductive pattern is connected to the annular pattern of the gate conductor. A conductive body contact is also disposed in the vicinity of the second conductive pattern.