High speed amplifier incorporating pre-emphasis

An amplifier circuit for receiving an input signal and providing an output signal, comprises a main chain of logic stages with a plurality of nodes therebetween, and at least one auxiliary chain nested between one node in the main chain and another node, which is not the next node, to form a series...

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Bibliographic Details
Main Authors DEAS ALEXANDER R, ABROSIMOV IGOR A
Format Patent
LanguageEnglish
Published 28.04.2005
Edition7
Subjects
AMPLIFIERS
BASIC ELECTRONIC CIRCUITRY
CONTROL OF AMPLIFICATION
ELECTRICITY
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
PULSE TECHNIQUE
RESONATORS
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Summary:An amplifier circuit for receiving an input signal and providing an output signal, comprises a main chain of logic stages with a plurality of nodes therebetween, and at least one auxiliary chain nested between one node in the main chain and another node, which is not the next node, to form a series of feed back or feed forward nested equalisation loops; whereby the input signal is fed serially down the main chain and is also fed through the said at least one auxiliary chain and summed to provide the output signal. The invention overcomes gain-bandwidth limits of the drive stages and bandwidth reductions that occur when analogue stages operating in a linear mode are concatenated.
Bibliography:Application Number: US20040997591