Data selection circuit for performance counter
In one embodiment, the invention is directed to a data selection circuit for a general purpose performance counter ("GPPC") connected to a bus carrying debug data. The data selection circuit is connected to receive the debug data and comprises logic for receiving the debug data as a plural...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
25.11.2004
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | In one embodiment, the invention is directed to a data selection circuit for a general purpose performance counter ("GPPC") connected to a bus carrying debug data. The data selection circuit is connected to receive the debug data and comprises logic for receiving the debug data as a plurality of N-bit portions of block-aligned data and outputting a designated one of the N-bit portions; and circuitry for providing to the receiving logic a control signal for designating one of the N-bit portions. |
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Bibliography: | Application Number: US20030635103 |