Automatic clock gating insertion in an IC design

A computer implemented method is provided for deriving gated clock circuitry in an integrated circuit design comprising: identifying sequential elements and associated feedback loops in the design in the design; for one or more identified sequential elements associated feedback loop, producing a fee...

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Bibliographic Details
Main Authors HUANG STEVE C, FAN YONG, CHEN IHAO
Format Patent
LanguageEnglish
Published 11.11.2004
Edition7
Subjects
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