Semiconductor device including dual damascene interocnnections
A method (and structure) of forming an interconnect on a semiconductor substrate, includes forming a relatively narrow first structure in a dielectric formed on a semiconductor substrate, forming a relatively wider second structure in the dielectric formed on the semiconductor substrate, forming a l...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
04.11.2004
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | A method (and structure) of forming an interconnect on a semiconductor substrate, includes forming a relatively narrow first structure in a dielectric formed on a semiconductor substrate, forming a relatively wider second structure in the dielectric formed on the semiconductor substrate, forming a liner in the first and second structures such that the first structure is substantially filled and the second structure is substantially unfilled, and forming a metallization over the liner to completely fill the second structure. |
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Bibliography: | Application Number: US20040853492 |