Apparatus and methods for analyzing graphs

A plurality of hardware cells are defined, wherein at least a given one of the hardware cells corresponds to sets of vertices from a graph having vertices and edges interconnecting the vertices, and each of the sets are from a corresponding one of a number of portions of the graph. The given hardwar...

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Bibliographic Details
Main Authors MENCER OSKAR, HUELSBERGEN LORENZ FRANCIS
Format Patent
LanguageEnglish
Published 14.10.2004
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A plurality of hardware cells are defined, wherein at least a given one of the hardware cells corresponds to sets of vertices from a graph having vertices and edges interconnecting the vertices, and each of the sets are from a corresponding one of a number of portions of the graph. The given hardware cell is adapted to select one of the sets of vertices and to define for the selected set of vertices whether an edge exists in the graph between the vertices in the selected set. The hardware cells are used to analyze one or more properties of the graph, such as reachability or shortest path. The graph is mapped into an adjacency matrix, which contains a number of contexts, each context having a number of elements, and where the given hardware cell corresponds to multiple contexts of the adjacency matrix.
Bibliography:Application Number: US20030400904