System and method for transferring data from a first clock domain to a second clock domain

A system and method using a synchronizer circuit for effectuating data transfer across a clock domain boundary between a first clock domain and a second clock domain, wherein the first clock domain is operable with a first clock signal and the second clock domain is operable with a second clock sign...

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Bibliographic Details
Main Authors AKKERMAN RYAN L, ADKISSON RICHARD W
Format Patent
LanguageEnglish
Published 30.09.2004
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A system and method using a synchronizer circuit for effectuating data transfer across a clock domain boundary between a first clock domain and a second clock domain, wherein the first clock domain is operable with a first clock signal and the second clock domain is operable with a second clock signal. The first and second clock signals have a ratio of N first clock cycles to (N-1) second clock cycles. A first circuit portion operates to transfer (N-1) data bits, based on which clock cycle of the first clock signal has an extra data bit, out of N data bits across the clock boundary on a first data path of the synchronizer output. A second circuit portion operates to transfer the remaining extra data bit on a second data path of the synchronizer's output.
Bibliography:Application Number: US20030397555