CHARGE-TRAPPING MEMORY ARRAYS RESISTANT TO DAMAGE FROM CONTACT HOLE FORMATION

The present invention relates to a memory array comprising a substrate and a plurality of bitlines having contacts and a plurality of wordlines intersecting the bitlines. A protective spacer is used to separate the bitline contacts from the wordlines adjacent to the bitline contacts to prevent damag...

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Bibliographic Details
Main Authors SHIRAIWA HIDEHIKO, RAMSBEY MARK T, KAMAL TAZRIEN, CHEUNG FRED TK
Format Patent
LanguageEnglish
Published 09.09.2004
Edition7
Subjects
ELECTRICITY
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Summary:The present invention relates to a memory array comprising a substrate and a plurality of bitlines having contacts and a plurality of wordlines intersecting the bitlines. A protective spacer is used to separate the bitline contacts from the wordlines adjacent to the bitline contacts to prevent damage caused during the formation of the bitline contacts. The present invention also relates to a method of forming the memory array.
Bibliography:Application Number: US20030382726