Connector that enables aggregation of independent system resources across PCI/PCI-X bus and interlocked method for aggregating independent system resources across PCI/PCI-X bus

The peripheral bus connector for improved aggregation of resources of a device on the peripheral bus includes a plurality of aggregation pins, in addition to the pins according to the peripheral bus standard. Signals from a controller on an extended peripheral bus adapter sends and receives signals...

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Bibliographic Details
Main Authors LEE TIMOTHY, ANDRESEN MARK E, FORE RICHARD C, MCNEILL ANDREW B, VIEIRA DAVID E
Format Patent
LanguageEnglish
Published 13.05.2004
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:The peripheral bus connector for improved aggregation of resources of a device on the peripheral bus includes a plurality of aggregation pins, in addition to the pins according to the peripheral bus standard. Signals from a controller on an extended peripheral bus adapter sends and receives signals in addition to standard signals of the peripheral bus through the aggregation pins. The aggregated device is hidden from third parties, and its existence is known only to the controller on the extended peripheral bus adapter. In this manner, resources are aggregated across a peripheral bus without needing the addition of another controller and without the need to redefine standard peripheral bus signals. In addition, standard peripheral bus adapters may still be used in the connector if resource aggregation is not desired.
Bibliography:Application Number: US20020293860