Sea-of-cells array of transistors

The invention concerns integrated circuits in which a MACRO is embedded in a standard cell array. One level of metal is devoted exclusively to non-local interconnect, and a layer of polysilicon is devoted to local interconnect, thereby saving significant space.

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Bibliographic Details
Main Author CRAFTS HAROLD S
Format Patent
LanguageEnglish
Published 22.04.2004
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The invention concerns integrated circuits in which a MACRO is embedded in a standard cell array. One level of metal is devoted exclusively to non-local interconnect, and a layer of polysilicon is devoted to local interconnect, thereby saving significant space.
Bibliography:Application Number: US20030719357