Method and apparatus of fast modular reduction

Methods and apparatus reduce the computational load for computing r=x mod n, given two numbers x and n, where x is 2t bits long and n is t bits long. Such reduced computational loading in modular reduction schemes is useful for, at least, network communication systems that include modular reduction...

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Bibliographic Details
Main Author SHE ALFRED C
Format Patent
LanguageEnglish
Published 30.10.2003
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:Methods and apparatus reduce the computational load for computing r=x mod n, given two numbers x and n, where x is 2t bits long and n is t bits long. Such reduced computational loading in modular reduction schemes is useful for, at least, network communication systems that include modular reduction in cryptography, particularly, public key encryption algorithms such as RSA, El Gamal, Rabin, and Diffie-Hellman.
Bibliography:Application Number: US20020136662