Low voltage amplifying circuit

A trigger circuit (22) having a depletion mode ntype transistor (32) and a depletion mode p-type transistor (34) operate by having each gate thereof driven by an independent source. When both transistors are on, the depletion mode n-type transistor (32) is driven by Is1 to Vsupply and the depletion...

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Bibliographic Details
Main Authors ALBERKRACK JADE H, HALL JEFFERSON W
Format Patent
LanguageEnglish
Published 03.07.2003
Edition7
Subjects
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
PULSE TECHNIQUE
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Summary:A trigger circuit (22) having a depletion mode ntype transistor (32) and a depletion mode p-type transistor (34) operate by having each gate thereof driven by an independent source. When both transistors are on, the depletion mode n-type transistor (32) is driven by Is1 to Vsupply and the depletion mode p-type transistor (34) is driven by Is2 to ground. When both transistors are off, a transistor (26) is switched on driving Is1 to ground, and a transistor (28) is switched on driving the gate of depletion mode p-type transistor (34) to Vsupply. A linear regulator (50) using a depletion mode transistor pair (52, 54) with their gates thereof driven by separate sources provides a low voltage operation with minimal current leakage. One depletion mode transistor (52) is an n-type, and the second depletion mode transistor (54) is a p-type transistor.
Bibliography:Application Number: US20020087712