Semiconductor device with flexible redundancy system

A memory cell array includes spare elements for saving a defective cell. Fuse sets each contain a defective address and mapping information indicative of the relationship between the fuse sets and the spare elements. When the defective address matches an input address, each fuse set outputs a signal...

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Bibliographic Details
Main Author TAKASE SATORU
Format Patent
LanguageEnglish
Published 12.06.2003
Edition7
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A memory cell array includes spare elements for saving a defective cell. Fuse sets each contain a defective address and mapping information indicative of the relationship between the fuse sets and the spare elements. When the defective address matches an input address, each fuse set outputs a signal for activating a corresponding spare element. The number of the fuse sets within a chip is smaller than the number of the spare elements.
Bibliography:Application Number: US20030348964