Isolation technology for submicron semiconductor devices
A process for making a semiconductor structure, includes forming a second dielectric layer on exposed regions of an intermediate structure. The intermediate structure includes: a semiconductor substrate having the regions, a first dielectric layer on at least a first portion of the semiconductor sub...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
13.02.2003
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | A process for making a semiconductor structure, includes forming a second dielectric layer on exposed regions of an intermediate structure. The intermediate structure includes: a semiconductor substrate having the regions, a first dielectric layer on at least a first portion of the semiconductor substrate, an etch-stop layer on at least a second portion of the first dielectric layer, and spacers on at least a third portion of said semiconductor substrate. The spacers are adjacent edges of the etch-stop layer and adjacent the exposed regions. |
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Bibliography: | Application Number: US20000505737 |