Memory circuit designed for a parallel reading or writing access to data comprising various components

The present invention relates to a memory circuit (MEM) able to receive a first data block comprising a number of components and coming from an external memory (EXT) for them to be written (W) in an internal memory. The memory circuit is also able to supply (R) to an output device (FIL) a second dat...

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Bibliographic Details
Main Authors LAFAGE ANNE, NGUYEN-PHUC LIEN, TALAYSSAT JACKY
Format Patent
LanguageEnglish
Published 23.01.2003
Edition7
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PICTORIAL COMMUNICATION, e.g. TELEVISION
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Summary:The present invention relates to a memory circuit (MEM) able to receive a first data block comprising a number of components and coming from an external memory (EXT) for them to be written (W) in an internal memory. The memory circuit is also able to supply (R) to an output device (FIL) a second data block comprising a component of said data. The memory circuit comprises data banks able to receive data words, and address controllers associated to the data banks and able to organize a reading or writing access of the data in the internal memory of the memory circuit, while minimizing the number of data banks used. Thus it is possible to rapidly read or write in the memory circuit at relatively low cost.
Bibliography:Application Number: US20020175411