Method of manufacturing a transistor

A method of manufacturing a thin film transistor (TFT) is disclosed comprising source and drain electrodes joined by a semiconductor channel layer, a gate insulating layer formed from at least two sublayers and a gate electrode. The method comprising the steps of forming the gate insulating layer by...

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Bibliographic Details
Main Author POWELL MARTIN J
Format Patent
LanguageEnglish
Published 19.09.2002
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method of manufacturing a thin film transistor (TFT) is disclosed comprising source and drain electrodes joined by a semiconductor channel layer, a gate insulating layer formed from at least two sublayers and a gate electrode. The method comprising the steps of forming the gate insulating layer by depositing a thin film sublayer using a thin film technique; and depositing a printed sublayer by printing, wherein the thin film sublayer is located adjacent the semiconductor channel layer. The TFT may be a top gate TFT wherein the thin film sublayer is formed on the semiconductor channel layer, and wherein the printed sublayer is formed over the thin film sublayer. Alternatively, the TFT may be a bottom gate TFT wherein the printed sublayer is formed over the gate electrode; wherein the thin film sublayer is formed over the printed sublayer, and wherein the semiconductor channel layer is formed on the thin film sublayer.
Bibliography:Application Number: US20020095872